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BoardSurfers: Avoid Iterations with Your Manufacturing Partner – Detect and Address DFM Issues in the Design Phase Using DesignTrue DFM

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 Some things are rare, good or bad, but they do happen from time to time. And, some happen so regularly, we often take them for granted if good or learn to live with them if bad. But should we? For example, you send out your design for fabrication and the CAM (computer-aided manufacturing) engineer runs a high-end design for manufacturability (DFM) analysis software. The CAM engineer sees DFM issues (almost always!). Now, there are three scenarios: the CAM engineer updates the design and informs you; the CAM engineer updates the design but forgets to inform you; or the worst case, the CAM engineer does not update the design at all thinking the issue was minor.

In the scenario that the CAM engineer informs you, you go ahead and make changes to your design and you are good, though it involves inconvenient rework. But in the scenario that the CAM engineer does not inform you, you are not good; the designs do not match, and your design has issues that you will never know. The scenario where the CAM engineer forgets to update the design needs no discussion, I suppose the loss of time and money is obvious enough.

In any case, you are either inundated with manufacturing issues in the middle of another project or your design is riddled with manufacturing issues and you are not aware; annular ring issues, copper spacing issues, differential pairs that neck down and shouldn’t, void around the via—the traces run right the edge of the cutout, plane issues—vias half in half out, and back drilling issues—spacing checks of drill hole to metal (annular ring metal remaining)—to name just a few.

So, the easiest and the most obvious thing to do is to run DFM analysis and correct any issues before sending the boards off to the fabricators. Well, you like this solution and create an internal signoff group to address any manufacturing issues (the conventional design for fabrication flow). But, are you then not spending time reworking the design late anyway? And add to that the fact that the designer is not running DFM but correcting identified problems? So, it seems this flow, which we shall call the Conventional Design for Fabrication Flow, is not the most ideal solution.

That’s why it is a good idea to perform DFM analysis early in the cycle and by the designer. It was a difficult proposition earlier, an easier said than done thing. But no more. The DesignTrue DFM feature of Allegro® PCB Editor has made it available in an easy-to-use format.

DesignTrue DFM Design Fabrication Flow

In PCB Editor, manufacturability checks are available from the software itself—you don’t need a separate software and wait till the end to identify and correct issues. The signoff phase still exists using tools such as Allegro®/OrCAD® Manufacturing Option, but with DesignTrue DFM, the iterations and the time required to produce fabrication data decreases multiple times. DesignTrue DFM identifies issues that might come up when boards are being manufactured, that is when boards are being fabricated and assembled. So, you have two main types of analyses, design for fabrication (DFF) and design for assembly (DFA). We will talk about them in detail in our upcoming posts.


DATA Pulse: In Search of the Perfect Environment—Configuring Allegro EDM

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  Ah, the office temperature – that eternal debate. As in many offices, ours has some people who feel that they're in the Sahara Desert, others who bundle up like they're in Antarctica, a few who just don't care about the temperature, and some who can't quite figure out if they're ever comfortable, like Goldilocks. There is however no 'perfect' temperature. So many variables impact the physical environment of the office – one's activity level, humidity, the outside temperature.

It's the same with Allegro EDM, a client-server suite of applications. There is no 'perfect' environment that suits everyone. Its configuration depends on several factors – Does your company have multiple sites? Do they span geographic regions? How many users do you have per site? Do you intend to work across releases? For example, your X server is in 16.6 and your Y server is in 17.2. What is the average Designer Server’s load at a site? Do you want redundant Designer Servers? What's the network performance in each site? What kind and data size do you manage? Do you plan to scale up your setup? What is your budget? What is your existing library and design data management setup? What sort of hardware do you already have?

Using Allegro EDM's Configuration Manager, a wizard for ECAD administrators, configure the EDM server, clients, and sites and move to the latest hotfix versions. Also customize workspaces, manage utility and library distribution configurations, and compare two sites and merge differences if needed. 

After you configure your EDM servers and clients, view the Configuration Manager map for the locations of various servers around the world and their status.

Particularly helpful for troubleshooting, to reduce an ECAD administrator's response time, and to improve server uptime, you can check on the health of the EDM server from the Configuration Manager: which version of EDM is installed, whether the server is up and running, which software components are installed, and hardware statistics. 

When configuring EDM, you can also decide whether to have the EDM server log various kinds of messages—errors, warnings, and information messages—and whether you want to be notified of these through e-mails. As an ECAD administrator, this can help you more easily monitor the health of the server. Messages are logged in the \<pcbdw_lib>\server\log\adwserver.out file.

Once you configure Allegro EDM, use <startworkbench>.bat to open Allegro EDM Flow Manager. Among other things, Flow Manager is a cockpit through which you can launch all EDM applications. 

Want to know more? Configure Allegro EDM 17.2 using a sample database available with the following Cadence Rapid Adoption Kit (RAK): Configuring Allegro Engineering Design Management (EDM) with a Default Database. Cadence RAKs are easily available by going to support.cadence.com and selecting Resources — Rapid Adoption Kits. So, get yourself a cup of coffee, gaze out at the view from your window, then hit the books!

Related Resources

BoardSurfers: Designing a Rigid-Flex Board Using PCB Editor

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BoardSurfers: Cadence Allegro BlogWhether you are designing the latest pace-maker or a LED strip, you have definitely pondered awhile about rigid PCBs and flex PCBs. You might have gone through a pile of literature, called up friends who have already done it (after all flex PCBs have been around for more than half a century now), and deliberated with your team to finally settle on a rigid-flex PCB. Well, what had started as a cutting-edge requirement to enable humanity's space dreams is today almost ubiquitous - think smart, wearable devices. There are many reasons why rigid-flex has become common, and the reasons are based on practical requirements of the time: dense designs, ever-decreasing size of devices, signal integrity requirements, and so on. But all these (size, density, etc) require a flex design, which increases the cost; and you want a balance -  you go for rigid-flex.  In the shortest possible way, quoting an earlier blog (not reinventing the wheel), here is the 'why' of choosing rigid-flex: "For nearly all applications, customers continue to demand smaller, lighter, and more cost-effective products. Competitive pressures also force designers to bring these new products to market at an ever-increasing rate. Designers can deploy flexible PCB materials (flex/rigid-flex) to meet challenging form-factor requirements, eliminate connectors, and improve performance."

But as soon as a solution becomes popular, we start looking at enhancements to make it even better and optimize it further. Even in the rigid-flex PCB world, we have come a long way. To again quote from an earlier blog, Making Rigid-Flex PCB Design a Little Easier,  "Designers once integrated the flexible portion of their circuitry as a connector from one rigid board to another. But now that there are even more stringent area demands, designers are now placing components on the flexible circuit area."  Along with the new possibilities, applications, and requirements comes the part where we at Cadence can contribute - enabling you as designers in the most cost-effective and productive way possible.  

Rigid-Flex PCB

So how does PCB Editor enable you to design a rigid-flex PCB? Well, in many ways! But I am listing a few of the more important ones here.

Rigid-Flex Transformation (Bending)

Not only do you have the bend area capability on the 2D workspace, but you can also transform your rigid-flex designs from a flat 2D state into a transformed 3D state. You can visualize how your designs will look like when they are in their intended state. Oh, and the centering feature of 3D Canvas automatically re-centers rigid-flex designs on the canvas after a bend operation.

Multiple Flex Laminates Supporting Flex Circuit Coverlays

The soldermask layer in rigid PCBs is no good for flex PCBs. You now need a flex circuit coverlay. So, Cross Section Editor supports the entry of non-conductor layers -  mask and coating layers used in rigid, flex or rigid-flex applications. You will usually add these layers above the Top or below the Bottom surfaces but can also add them within the core stackup to accommodate multiple independent flex laminates. The Cross Section Editor provides total thicknesses for each stackup in terms of accumulated conductor layers as well as an option with mask layer thicknesses included. 

The multi-cross section support is complemented by an option to output a multi stackup table. The table supports entries for all conductor and non-conductor layers, material, and thicknesses.

 And, yes, the surface finish options have been enhanced too. So you can choose the right finish from the options available. 

Zone Management for Rigid and Flex

Now that you have a design that is a mix of rigid and flexible parts, you need a capability to manage the physical areas pertaining to these.

A physical zone is used to map an area of the design to one of the stackups created in the Cross Section Editor. Zones can be rigid or flex areas consisting of varying layers. Rigid zones, for example, might be comprised of 10 conductor layers and soldermask whereas a flex zone may contain 2 conductor layers plus several mask layers such as coverlay, adhesive, or stiffeners.

Zones automatically include associated keepouts and optional constraint regions and rooms. Any part of the board that is outside of any zone will use the Primary Stack-up for its layer cross-section. 

Checking Coverage and Clearances - Interlayer Checks

When you are designing a rigid PCB, you verify the proper clearance and coverage for masks and surfaces. Rigid-flex designs not only have the same mask and surface finish requirements but the addition of bend areas, stiffeners, and so on, that require special clearances or overlaps of materials, spacing, and design features. So you need (and get) the interlayer checks capabilities. What's more, you get the power of in-design checks, as mentioned by Ed Hickey in the white paper Automating Inter-Layer In-Design Checks in Rigid-Flex PCBs: "By allowing you to perform DRCs for various non-electrical flex layers, the tool (PCB Editor) helps to save time and avoid respins. The tool also supports real-time concurrent team design, so multiple PCB designers can work on the same PCB design database. "

Conclusion

So far so good but words are only words, why not try it out? Walk the walk? Click here for a Rapid Adoption Kit with detailed step-by-step procedures on the Rigid-Flex functionality, including various important aspects not discussed in this blog, such as IPC-2581 Layer Function support, multi stack up grid, and manufacturing preparation support. The Rapid Action Kit is accompanied by a database that you can use to perform the exercises in the document. 

Note: The above link can only be accessed by Cadence customers who have a valid login ID for https://support.cadence.com

BoardSurfers: PCB Electronics - Three Routing Challenges and Their Solutions

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Routing is the core of a PCB. And, it's not an easy task. There are many challenges but, thankfully, there are solutions too. Here we list three common challenges and explain how to solve them. (read more)

BoardSurfers: PCB Electronics - Six Tasks To Prepare Board for Manufacturing

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You have placed components and routed the board. You are finally ready to send the design to a fabrication house to be manufactured. But wait, you have to perform a few tasks yet.(read more)

DATA Pulse: Collaborate and Combine Forces – Allegro EDM Team Design

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Working in an ECAD design team? Want to control access to certain design elements? Would notifications of design changes by other team members be helpful? If yes…(read more)

BoardSurfers: Going Beyond Just Correct - Improving and Optimizing Design and Routing

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PCB layout editors provide many checks in the form of constraints and rules to ensure your design is correct. You even have the DFM rules to prevent fabrication or manufacturing issues. Then you have automatic routing to ensure an errorless board with the right connections and traces. But are you satisfied only with 'just a correct' board? Or, do you want to optimize it further? And what about 'quality'? (read more)

DATA Pulse: In Search of the Perfect Environment—Configuring Allegro EDM

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  Ah, the office temperature – that eternal debate. As in many offices, ours has some people who feel that they're in the Sahara Desert, others who bundle up like they're in Antarctica, a few who just don't care about the temperature, and some who can't quite figure out if they're ever comfortable, like Goldilocks. There is however no 'perfect' temperature. So many variables impact the physical environment of the office – one's activity level, humidity, the outside temperature.

It's the same with Allegro EDM, a client-server suite of applications. There is no 'perfect' environment that suits everyone. Its configuration depends on several factors – Does your company have multiple sites? Do they span geographic regions? How many users do you have per site? Do you intend to work across releases? For example, your X server is in 16.6 and your Y server is in 17.2. What is the average Designer Server’s load at a site? Do you want redundant Designer Servers? What's the network performance in each site? What kind and data size do you manage? Do you plan to scale up your setup? What is your budget? What is your existing library and design data management setup? What sort of hardware do you already have?

Using Allegro EDM's Configuration Manager, a wizard for ECAD administrators, configure the EDM server, clients, and sites and move to the latest hotfix versions. Also customize workspaces, manage utility and library distribution configurations, and compare two sites and merge differences if needed. 

After you configure your EDM servers and clients, view the Configuration Manager map for the locations of various servers around the world and their status.

Particularly helpful for troubleshooting, to reduce an ECAD administrator's response time, and to improve server uptime, you can check on the health of the EDM server from the Configuration Manager: which version of EDM is installed, whether the server is up and running, which software components are installed, and hardware statistics. 

When configuring EDM, you can also decide whether to have the EDM server log various kinds of messages—errors, warnings, and information messages—and whether you want to be notified of these through e-mails. As an ECAD administrator, this can help you more easily monitor the health of the server. Messages are logged in the \<pcbdw_lib>\server\log\adwserver.out file.

Once you configure Allegro EDM, use <startworkbench>.bat to open Allegro EDM Flow Manager. Among other things, Flow Manager is a cockpit through which you can launch all EDM applications. 

Want to know more? Configure Allegro EDM 17.2 using a sample database available with the following Cadence Rapid Adoption Kit (RAK): Configuring Allegro Engineering Design Management (EDM) with a Default Database. Cadence RAKs are easily available by going to support.cadence.com and selecting Resources — Rapid Adoption Kits. So, get yourself a cup of coffee, gaze out at the view from your window, then hit the books!

Related Resources


BoardSurfers: Designing a Rigid-Flex Board Using PCB Editor

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BoardSurfers: Cadence Allegro BlogWhether you are designing the latest pace-maker or a LED strip, you have definitely pondered awhile about rigid PCBs and flex PCBs. You might have gone through a pile of literature, called up friends who have already done it (after all flex PCBs have been around for more than half a century now), and deliberated with your team to finally settle on a rigid-flex PCB. Well, what had started as a cutting-edge requirement to enable humanity's space dreams is today almost ubiquitous - think smart, wearable devices. There are many reasons why rigid-flex has become common, and the reasons are based on practical requirements of the time: dense designs, ever-decreasing size of devices, signal integrity requirements, and so on. But all these (size, density, etc) require a flex design, which increases the cost; and you want a balance -  you go for rigid-flex.  In the shortest possible way, quoting an earlier blog (not reinventing the wheel), here is the 'why' of choosing rigid-flex: "For nearly all applications, customers continue to demand smaller, lighter, and more cost-effective products. Competitive pressures also force designers to bring these new products to market at an ever-increasing rate. Designers can deploy flexible PCB materials (flex/rigid-flex) to meet challenging form-factor requirements, eliminate connectors, and improve performance."

But as soon as a solution becomes popular, we start looking at enhancements to make it even better and optimize it further. Even in the rigid-flex PCB world, we have come a long way. To again quote from an earlier blog, Making Rigid-Flex PCB Design a Little Easier,  "Designers once integrated the flexible portion of their circuitry as a connector from one rigid board to another. But now that there are even more stringent area demands, designers are now placing components on the flexible circuit area."  Along with the new possibilities, applications, and requirements comes the part where we at Cadence can contribute - enabling you as designers in the most cost-effective and productive way possible.  

Rigid-Flex PCB

So how does PCB Editor enable you to design a rigid-flex PCB? Well, in many ways! But I am listing a few of the more important ones here.

Rigid-Flex Transformation (Bending)

Not only do you have the bend area capability on the 2D workspace, but you can also transform your rigid-flex designs from a flat 2D state into a transformed 3D state. You can visualize how your designs will look like when they are in their intended state. Oh, and the centering feature of 3D Canvas automatically re-centers rigid-flex designs on the canvas after a bend operation.

Multiple Flex Laminates Supporting Flex Circuit Coverlays

The soldermask layer in rigid PCBs is no good for flex PCBs. You now need a flex circuit coverlay. So, Cross Section Editor supports the entry of non-conductor layers -  mask and coating layers used in rigid, flex or rigid-flex applications. You will usually add these layers above the Top or below the Bottom surfaces but can also add them within the core stackup to accommodate multiple independent flex laminates. The Cross Section Editor provides total thicknesses for each stackup in terms of accumulated conductor layers as well as an option with mask layer thicknesses included. 

The multi-cross section support is complemented by an option to output a multi stackup table. The table supports entries for all conductor and non-conductor layers, material, and thicknesses.

 And, yes, the surface finish options have been enhanced too. So you can choose the right finish from the options available. 

Zone Management for Rigid and Flex

Now that you have a design that is a mix of rigid and flexible parts, you need a capability to manage the physical areas pertaining to these.

A physical zone is used to map an area of the design to one of the stackups created in the Cross Section Editor. Zones can be rigid or flex areas consisting of varying layers. Rigid zones, for example, might be comprised of 10 conductor layers and soldermask whereas a flex zone may contain 2 conductor layers plus several mask layers such as coverlay, adhesive, or stiffeners.

Zones automatically include associated keepouts and optional constraint regions and rooms. Any part of the board that is outside of any zone will use the Primary Stack-up for its layer cross-section. 

Checking Coverage and Clearances - Interlayer Checks

When you are designing a rigid PCB, you verify the proper clearance and coverage for masks and surfaces. Rigid-flex designs not only have the same mask and surface finish requirements but the addition of bend areas, stiffeners, and so on, that require special clearances or overlaps of materials, spacing, and design features. So you need (and get) the interlayer checks capabilities. What's more, you get the power of in-design checks, as mentioned by Ed Hickey in the white paper Automating Inter-Layer In-Design Checks in Rigid-Flex PCBs: "By allowing you to perform DRCs for various non-electrical flex layers, the tool (PCB Editor) helps to save time and avoid respins. The tool also supports real-time concurrent team design, so multiple PCB designers can work on the same PCB design database. "

Conclusion

So far so good but words are only words, why not try it out? Walk the walk? Click here for a Rapid Adoption Kit with detailed step-by-step procedures on the Rigid-Flex functionality, including various important aspects not discussed in this blog, such as IPC-2581 Layer Function support, multi stack up grid, and manufacturing preparation support. The Rapid Action Kit is accompanied by a database that you can use to perform the exercises in the document. 

Note: The above link can only be accessed by Cadence customers who have a valid login ID for https://support.cadence.com

BoardSurfers: Capturing Design Intent for Automatic Routing in PCB Editor

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BoardSurfers: Cadence Allegro BlogImagine you are designing a complex board with thousands of interconnects and all the usual complexities inherent in a dense design that is also highly constrained. Well, it's easy, the 'imagine' part; and you don't even have to try like John Lennon had crooned in his Imagine song, because most probably you are actually designing one right now that is dominated by bussed interconnect. And most probably your mind is stretched to its limit keeping track of the thousands of connections across several layers and a variety of constraints. 

PCB design dominated by bussed interconnect

What if I now tell you that you can use PCB Editor to do the following:

  • Intelligently plan and autoroute interconnect
  • Capture all electrical constraints and designer intent
  • Route your design using flow planning to enable a “correct the first time” execution
  • Boost performance and productivity significantly
  • Reduce cycle time reductions during placement and routing
  • Shorten overall design process in contrast to today’s manual planning and routing methods

In one of our earlier blogs discussing rigid-flex PCBs, we had mentioned how flexible PCBs were around for more than half a century but was difficult to implement because tools till now were not supporting an easy implementation. Same is the case with complex interfaces; we were living on with the limitations, struggling and reworking to make do with what we had. No more! You can now use PCB Editor to capture all electrical design intent and designer preference before starting with detailed routing. You can also rest assured that routing will implement the interconnect flow exactly. Of course, you will significantly reduce cycle time during placement and routing because of the automated process. 

PCB Editor lets you handle the interconnects graphically by abstracting the interconnect data, making it easier to define and capture your routing intent. And, yes, you don't need to overload your short-term working memory while routing, because the advanced autorouter keeps track of the hierarchies and routing spaces. The autorouter will validate design intent, as you are working, to enable you to make the right decisions. Also, by identifying interconnect issues early in the design, the autorouter makes you aware of issues that might have lingered on forcing you to rework. And the best part? You don't have to go back to the beginning if you recognize an issue, rather you can back up to any of a previous planning stage.

If you are already excited and want to know more about interconnect flow planning and other PCB Editor features that help you increase productivity, click here for a Rapid Adoption Kit with detailed step-by-step procedures on design planning of high-speed designs.

Note: The above link can only be accessed by Cadence customers who have a valid login ID for https://support.cadence.com

BoardSurfers - Aerials and Bails: How to Rename Reference Designators Using Batch Command

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Components on a board are often placed per their functional group and hence their reference designators are all jumbled up. It is a common practice to rename reference designators before sending out the design data to manufacturers. Reference designator...(read more)

BoardSurfers: Five Ways to View Your Design in 3D Canvas

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Five simple yet effective ways to increase efficiency by selecting the right objects you want to model, say, all the pins or a subset of the pins in a design.(read more)

Cadence OrCAD and Allegro 17.4-2019 is Now Available

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Here is a sleeker and more modern version of the OrCAD and Allegro release, with enhanced usability and a slew of new productivity-enhancing features. With the 17.4-2019 release, you get more intuitive and easy-to-use flows that enable optimized schematic-to-board-to-...(read more)

What's in a Name? From Allegro EDM to Pulse in 17.4-2019

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Allegro EDM (Engineering Data Management) 17.4-2019 is out! So, what's in it for you?(read more)

BoardSurfers: What's Happening Around 17.4-2019?

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Allegro and OrCAD 17.4-2019 was released on October 18 and we have since then been getting a lot of queries about a lot of things. How do I install the products? What are the system requirements? What has changed? What's there in it for me? Is there ...(read more)

BoardSurfers: Power of Information – Quickly Getting Started with Allegro and OrCAD Release 17.4-2019

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The Allegro and OrCAD 7.4 release is now available for download and installation. Many of you must have already started using it and many more of you must be planning to install it in the coming days or weeks. Do you have all it needs to use the programs?(read more)

BoardSurfers: Installing on Windows is as Easy as Updating Apps on your Smart Phone

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Did you know that you can download and install available Cadence Allegro and OrCAD product releases and updates on Windows in an easy way using Cadence Download Manager? Yes, no more visiting the downloads.cadence.com site to check for...(read more)

Experience the Power of OrCAD with Its Trial Version

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OrCAD Trial 2019 is out. Download and use the full power of the latest release of OrCAD Capture CIS, PSpice, PCB Editor, OrCAD Sigrity ERC, and more, for up to 30 days. Designed to accelerate your productivity, this is a ...(read more)

Search Faster and Smarter in Release 17.4-2019

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Allegro and OrCAD 17.4-2019 products come with the latest version of CDNSHelp. In this post, I will quickly share the changes made in this release, that will make things much simpler and before you realize it, your content searches will give you better results, and you get more done. Or, know more about what ... (read more)

Quickly View Schematic Designs, Boards, and IC Packages for Free Using Cadence PCB Design Viewers 2019

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Quickly view a schematic, layout, or IC package without installing the complete OrCAD product suite. Get free, read-only access to design data created in OrCAD Capture, PCB Editor, orAllegro Package Designer+ (APD+). Perhaps you hav...(read more)
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