Just a brief post this week to mention a new capability for Allegro Design Entry HDL (DEHDL) that was made available in the 16.6-QIR4 release.
You can now employ net renaming without loss of data:
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You can now employ net renaming without loss of data:
- All instances of the net will be renamed to a new name
- All properties and constraints captured on the net instances retained
- All membership to net objects are retained
The net rename capability is available as:
- A menu command
- A context (RMB) menu command
- Change of a net name
- Using the Attribute Editor
- Using the Change command
- As a DEHDL console command:
_netrename <old_net_name> <new_net_name>
I look forward to your feedback on this capability.
Jerry “GenPart” Grzenia